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Add clock heuristic test vector for congestion control.
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src/test/test_congestion_control.c
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97
src/test/test_congestion_control.c
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#include "core/or/or.h"
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#include "test/test.h"
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#include "test/log_test_helpers.h"
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#include "lib/testsupport/testsupport.h"
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#define TOR_CONGESTION_CONTROL_COMMON_PRIVATE
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#define TOR_CONGESTION_CONTROL_PRIVATE
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#include "core/or/congestion_control_st.h"
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#include "core/or/congestion_control_common.h"
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void test_congestion_control_rtt(void *arg);
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void test_congestion_control_clock(void *arg);
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/* =============== Clock Heuristic Test Vectors =============== */
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typedef struct clock_vec
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{
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uint64_t old_delta_in;
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uint64_t new_delta_in;
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bool in_slow_start_in;
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bool cached_result_out;
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bool result_out;
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} clock_vec_t;
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static void
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run_clock_test_vec(congestion_control_t *cc,
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clock_vec_t *vec, size_t vec_len)
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{
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for (size_t i = 0; i < vec_len; i++) {
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cc->in_slow_start = vec[i].in_slow_start_in;
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cc->ewma_rtt_usec = vec[i].old_delta_in*1000;
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bool ret = time_delta_stalled_or_jumped(cc,
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vec[i].old_delta_in,
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vec[i].new_delta_in);
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tt_int_op(ret, OP_EQ, vec[i].result_out);
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tt_int_op(is_monotime_clock_broken, OP_EQ, vec[i].cached_result_out);
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}
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done:
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is_monotime_clock_broken = false;
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}
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/**
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* This test verifies the behavior of Section 2.1.1 of
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* Prop#324 (CLOCK_HEURISTICS).
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*
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* It checks that we declare the clock value stalled,
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* and cache that value, on various time deltas.
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*
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* It also verifies that our heuristics behave correctly
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* with respect to slow start and large clock jumps/stalls.
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*/
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void
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test_congestion_control_clock(void *arg)
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{
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(void)arg;
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clock_vec_t vect1[] =
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{
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{0, 1, 1, 0, 0}, // old delta 0, slow start -> false
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{0, 0, 1, 1, 1}, // New delta 0 -> cache true, return true
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{1, 1, 1, 1, 0}, // In slow start -> keep cache, but return false
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{1, 4999, 0, 0, 0}, // Not slow start, edge -> update cache, and false
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{4999, 1, 0, 0, 0}, // Not slow start, other edge -> false
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{5001, 1, 0, 0, 0}, // Not slow start w/ -5000x -> use cache (false)
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{5001, 0, 0, 1, 1}, // New delta 0 -> cache true, return true
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{5001, 1, 0, 1, 1}, // Not slow start w/ -5000x -> use cache (true)
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{5001, 1, 1, 1, 0}, // In slow start w/ -5000x -> false
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{0, 5001, 0, 1, 0}, // Not slow start w/ no EWMA -> false
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{1, 5001, 1, 1, 0}, // In slow start w/ +5000x -> false
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{1, 1, 0, 0, 0}, // Not slow start -> update cache to false
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{5001, 1, 0, 0, 0}, // Not slow start w/ -5000x -> use cache (false)
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{1, 5001, 0, 0, 1}, // Not slow start w/ +5000x -> true
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{0, 5001, 0, 0, 0}, // Not slow start w/ no EWMA -> false
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{5001, 1, 1, 0, 0}, // In slow start w/ -5000x change -> false
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{1, 1, 0, 0, 0} // Not slow start -> false
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};
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circuit_params_t params;
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params.cc_enabled = 1;
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params.sendme_inc_cells = TLS_RECORD_MAX_CELLS;
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cc_alg = CC_ALG_VEGAS;
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congestion_control_t *cc = congestion_control_new(¶ms, CC_PATH_EXIT);
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run_clock_test_vec(cc, vect1, sizeof(vect1)/sizeof(clock_vec_t));
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congestion_control_free(cc);
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}
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#define TEST_CONGESTION_CONTROL(name, flags) \
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{ #name, test_##name, (flags), NULL, NULL }
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struct testcase_t congestion_control_tests[] = {
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TEST_CONGESTION_CONTROL(congestion_control_clock, TT_FORK),
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END_OF_TESTCASES
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};
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